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机器学习
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多模态学习
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统计学
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抽样
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推断
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概率论
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计数
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</a>
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概率概念
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分布
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</span>
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</a>
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贝叶斯
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</span>
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</a>
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信息论
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</span>
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机器学习
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</span>
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<span class="md-nav__icon md-icon"></span>
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机器学习
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经典机器学习
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梯度机器学习
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</span>
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</a>
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深度学习
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</span>
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</a>
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强化学习
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</span>
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</a>
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分布式深度学习
|
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</span>
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|
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|
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|
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</a>
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计算语言学
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<span class="md-nav__icon md-icon"></span>
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计算语言学
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语言学基础
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</a>
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嵌入与序列模型
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</span>
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</a>
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Transformer 与语言模型
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</span>
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|
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</a>
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<span class="md-ellipsis">
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高级文本生成
|
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|
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|
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|
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</span>
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|
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|
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|
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</a>
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计算机视觉
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计算机视觉
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图像基础
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</span>
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</a>
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目标检测与分割
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多模态学习
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多模态学习
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多模态表征
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</span>
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</a>
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统一多模态架构
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</span>
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自主系统
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感知
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视觉-语言-动作模型
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自动驾驶
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</a>
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太空与极端机器人
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</span>
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图神经网络
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SIMD 与 GPU 编程
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ARM 与 NEON
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Triton、TPU 与 Pallas
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AI 推理
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量化
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高效架构
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服务与批处理
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边缘推理
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</a>
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扩缩与部署
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ML 系统设计
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大规模基础设施
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ML 设计案例
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应用 AI
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应用 AI
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AI 金融
|
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</a>
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<a href="../../chapter%2019%3A%20applied%20AI/02.%20protein%20design/" class="md-nav__link">
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蛋白质设计
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|
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</a>
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药物发现
|
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|
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|
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</span>
|
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|
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|
||
|
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</a>
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智能体系统
|
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|
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</span>
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|
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|
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|
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</a>
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|
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|
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|
||
|
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||
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<li class="md-nav__item">
|
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<a href="../../chapter%2019%3A%20applied%20AI/05.%20healthcare/" class="md-nav__link">
|
||
|
||
|
||
|
||
<span class="md-ellipsis">
|
||
|
||
|
||
医疗健康
|
||
|
||
|
||
|
||
</span>
|
||
|
||
|
||
|
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<label class="md-nav__link" for="__nav_21" id="__nav_21_label" tabindex="0">
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<span class="md-ellipsis">
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|
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前沿 AI
|
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|
||
</span>
|
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<span class="md-nav__icon md-icon"></span>
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<nav class="md-nav" data-md-level="1" aria-labelledby="__nav_21_label" aria-expanded="false">
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<span class="md-nav__icon md-icon"></span>
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前沿 AI
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</label>
|
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<ul class="md-nav__list" data-md-scrollfix>
|
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|
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<a href="../../chapter%2020%3A%20bleeding%20edge%20AI/01.%20quantum%20machine%20learning/" class="md-nav__link">
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|
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|
||
<span class="md-ellipsis">
|
||
|
||
|
||
量子机器学习
|
||
|
||
|
||
|
||
</span>
|
||
|
||
|
||
|
||
</a>
|
||
</li>
|
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|
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|
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|
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<span class="md-ellipsis">
|
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|
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|
||
神经形态计算
|
||
|
||
|
||
|
||
</span>
|
||
|
||
|
||
|
||
</a>
|
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<span class="md-ellipsis">
|
||
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||
|
||
太空数据中心
|
||
|
||
|
||
|
||
</span>
|
||
|
||
|
||
|
||
</a>
|
||
</li>
|
||
|
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<span class="md-ellipsis">
|
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去中心化 AI
|
||
|
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|
||
|
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</span>
|
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|
||
|
||
|
||
</a>
|
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</li>
|
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<a href="../../chapter%2020%3A%20bleeding%20edge%20AI/05.%20brain%20machine%20interfaces/" class="md-nav__link">
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||
|
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<span class="md-ellipsis">
|
||
|
||
|
||
脑机接口
|
||
|
||
|
||
|
||
</span>
|
||
|
||
|
||
|
||
</a>
|
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</li>
|
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|
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|
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|
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</ul>
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</nav>
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</ul>
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</div>
|
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</div>
|
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</div>
|
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<div class="md-sidebar md-sidebar--secondary" data-md-component="sidebar" data-md-type="toc" >
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<div class="md-sidebar__scrollwrap">
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<div class="md-sidebar__inner">
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<nav class="md-nav md-nav--secondary" aria-label="目录">
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<span class="md-nav__icon md-icon"></span>
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目录
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</label>
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<ul class="md-nav__list" data-md-component="toc" data-md-scrollfix>
|
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<li class="md-nav__item">
|
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<a href="#_2" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
||
|
||
数制
|
||
|
||
</span>
|
||
</a>
|
||
|
||
</li>
|
||
|
||
<li class="md-nav__item">
|
||
<a href="#_3" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
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|
||
逻辑门
|
||
|
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</span>
|
||
</a>
|
||
|
||
</li>
|
||
|
||
<li class="md-nav__item">
|
||
<a href="#cpu" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
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|
||
CPU架构
|
||
|
||
</span>
|
||
</a>
|
||
|
||
</li>
|
||
|
||
<li class="md-nav__item">
|
||
<a href="#_4" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
||
|
||
指令集架构
|
||
|
||
</span>
|
||
</a>
|
||
|
||
</li>
|
||
|
||
<li class="md-nav__item">
|
||
<a href="#_5" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
||
|
||
流水线
|
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|
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</span>
|
||
</a>
|
||
|
||
</li>
|
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|
||
<li class="md-nav__item">
|
||
<a href="#_6" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
||
|
||
存储器层次结构
|
||
|
||
</span>
|
||
</a>
|
||
|
||
</li>
|
||
|
||
<li class="md-nav__item">
|
||
<a href="#_7" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
||
|
||
虚拟内存
|
||
|
||
</span>
|
||
</a>
|
||
|
||
</li>
|
||
|
||
<li class="md-nav__item">
|
||
<a href="#iodma" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
||
|
||
I/O、中断和DMA
|
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|
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</span>
|
||
</a>
|
||
|
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</li>
|
||
|
||
<li class="md-nav__item">
|
||
<a href="#colab" class="md-nav__link">
|
||
<span class="md-ellipsis">
|
||
|
||
编程任务（使用CoLab或笔记本）
|
||
|
||
</span>
|
||
</a>
|
||
|
||
</li>
|
||
|
||
</ul>
|
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|
||
</nav>
|
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</div>
|
||
</div>
|
||
</div>
|
||
|
||
|
||
|
||
<div class="md-content" data-md-component="content">
|
||
|
||
<article class="md-content__inner md-typeset">
|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
<h1 id="_1">计算机体系结构<a class="headerlink" href="#_1" title="Permanent link">¶</a></h1>
|
||
<p><em>计算机体系结构是关于如何构建执行指令的机器。本文涵盖数制、逻辑门、CPU设计、指令集架构、流水线、存储器层次结构和虚拟内存——每个程序、框架和AI模型最终运行其上的硬件基础。</em></p>
|
||
<ul>
|
||
<li>每个神经网络、每个训练循环、每次推理调用最终都会变成流经晶体管的电信号序列。对于严肃的机器学习从业者来说，理解硬件不是可选的：它解释了为什么矩阵乘法很快，为什么内存是瓶颈，为什么GPU主导AI训练，以及为什么缓存友好的代码可以比朴素代码快100倍。</li>
|
||
</ul>
|
||
<h2 id="_2">数制<a class="headerlink" href="#_2" title="Permanent link">¶</a></h2>
|
||
<ul>
|
||
<li>
|
||
<p>计算机将所有内容表示为<strong>二进制</strong>（基2）：0和1的序列。每个数字是一个<strong>比特</strong>。8个比特为一组称为一个<strong>字节</strong>。二进制数 <span class="arithmatex">\(b_{n-1} b_{n-2} \ldots b_1 b_0\)</span> 的值为 <span class="arithmatex">\(\sum_{i=0}^{n-1} b_i \cdot 2^i\)</span>。</p>
|
||
</li>
|
||
<li>
|
||
<p>例如，<span class="arithmatex">\(1011_2 = 1 \cdot 8 + 0 \cdot 4 + 1 \cdot 2 + 1 \cdot 1 = 11_{10}\)</span>。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>十六进制</strong>（基16）是二进制的紧凑表示法。每个十六进制数字代表4个比特：<span class="arithmatex">\(0\text{-}9\)</span> 映射到 <span class="arithmatex">\(0000\text{-}1001\)</span>，<span class="arithmatex">\(A\text{-}F\)</span> 映射到 <span class="arithmatex">\(1010\text{-}1111\)</span>。因此 <span class="arithmatex">\(\text{0xFF} = 1111\,1111_2 = 255_{10}\)</span>。内存地址和颜色代码通常用十六进制书写。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>补码</strong>表示有符号整数。对于<span class="arithmatex">\(n\)</span>位数字，最高有效位的权重为 <span class="arithmatex">\(-2^{n-1}\)</span> 而非 <span class="arithmatex">\(+2^{n-1}\)</span>。8位补码的范围为 <span class="arithmatex">\(-128\)</span> 到 <span class="arithmatex">\(+127\)</span>。要取一个数的相反数：翻转所有位然后加1。这种表示使加法和减法使用相同的硬件电路，这就是它被普遍采用的原因。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>IEEE 754浮点数</strong>将实数表示为 <span class="arithmatex">\((-1)^s \times 1.m \times 2^{e-\text{bias}}\)</span>，其中<span class="arithmatex">\(s\)</span>是符号位，<span class="arithmatex">\(m\)</span>是尾数（小数部分），<span class="arithmatex">\(e\)</span>是移码指数。</p>
|
||
</li>
|
||
</ul>
|
||
<p><img alt="IEEE 754 float32布局：1个符号位、8个指数位、23个尾数位" src="../../images/ieee754_float.svg" /></p>
|
||
<div class="highlight"><pre><span></span><code>- **float32**（单精度）：1个符号 + 8个指数 + 23个尾数 = 32位。范围：$\approx \pm 3.4 \times 10^{38}$，精度：$\approx 7$位十进制数字。
|
||
- **float64**（双精度）：1个符号 + 11个指数 + 52个尾数 = 64位。范围：$\approx \pm 1.8 \times 10^{308}$，精度：$\approx 15$位十进制数字。
|
||
- **float16**（半精度）：1 + 5 + 10 = 16位。范围和精度有限，但使用一半的内存和带宽。广泛用于ML训练（混合精度，第6章）。
|
||
- **bfloat16**：1 + 8 + 7 = 16位。与float32相同的指数范围但精度更低。由Google专门为ML设计：完整的指数范围可防止训练期间溢出，降低的精度对梯度更新是可以接受的。
|
||
</code></pre></div>
|
||
<ul>
|
||
<li>浮点算术<strong>不精确</strong>。在float64中，<span class="arithmatex">\(0.1 + 0.2 \neq 0.3\)</span>（它等于 <span class="arithmatex">\(0.30000000000000004\)</span>）。这是因为<span class="arithmatex">\(0.1\)</span>没有精确的二进制表示，就像<span class="arithmatex">\(1/3\)</span>没有精确的十进制表示一样。在数百万次操作（如梯度下降）中积累这些误差可能导致数值不稳定，这就是为什么存在像损失缩放（第6章）和Kahan求和法这样的技术。</li>
|
||
</ul>
|
||
<h2 id="_3">逻辑门<a class="headerlink" href="#_3" title="Permanent link">¶</a></h2>
|
||
<ul>
|
||
<li>
|
||
<p>所有计算都可以归结为<strong>逻辑门</strong>：实现布尔运算（来自文件1的命题逻辑）的物理电路。</p>
|
||
</li>
|
||
<li>
|
||
<p>基本门：</p>
|
||
<ul>
|
||
<li><strong>与门</strong>（AND）：仅当两个输入都为1时输出为1。</li>
|
||
<li><strong>或门</strong>（OR）：至少一个输入为1时输出为1。</li>
|
||
<li><strong>非门</strong>（NOT，反相器）：翻转输入。</li>
|
||
<li><strong>与非门</strong>（NAND，NOT-AND）：通用门。任何其他门都可以仅由与非门构建。这就是为什么与非门是数字电路的基本构建块。</li>
|
||
<li><strong>异或门</strong>（XOR，异或）：输入不同时输出为1。对于加法（二进制加法的和位就是XOR）和加密至关重要。</li>
|
||
</ul>
|
||
</li>
|
||
<li>
|
||
<p><strong>半加器</strong>使用XOR（和）和AND（进位）相加两个单比特。<strong>全加器</strong>相加两个比特加上一个进位输入，可以串联起来创建<span class="arithmatex">\(n\)</span>位加法器。这就是CPU执行整数加法的方式：一系列简单逻辑门的级联。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>多路选择器</strong>（MUX）根据控制信号从多个输入中选择一个。使用<span class="arithmatex">\(n\)</span>个控制位，可以从<span class="arithmatex">\(2^n\)</span>个输入中选择。多路选择器是if-else链的硬件等价物，广泛用于CPU数据通路中路由数据。</p>
|
||
</li>
|
||
<li>
|
||
<p>现代处理器包含数十亿个晶体管，每个晶体管充当一个微小的开关。晶体管要么导通（导电，表示1），要么不导通（不导电，表示0）。门由晶体管构成，加法器由门构成，ALU由加法器构成，CPU由ALU构成。整个计算层级就建立在这个基础之上。</p>
|
||
</li>
|
||
</ul>
|
||
<h2 id="cpu">CPU架构<a class="headerlink" href="#cpu" title="Permanent link">¶</a></h2>
|
||
<ul>
|
||
<li>
|
||
<p><strong>中央处理器（CPU）</strong>执行指令。其核心组件：</p>
|
||
<ul>
|
||
<li>
|
||
<p><strong>ALU</strong>（算术逻辑单元）：执行整数算术（加、减、乘）和逻辑运算（AND、OR、XOR、移位）。这里是实际计算发生的地方，由上述逻辑门构建而成。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>寄存器</strong>：CPU内部微小、超快的存储位置。现代CPU有数十个通用寄存器，每个寄存器保存一个字（在64位CPU上为64位）。寄存器是系统中速度最快的存储器：访问时间约~0.3纳秒。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>程序计数器（PC）</strong>：保存下一条要执行指令的内存地址。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>控制单元</strong>：解码指令并编排数据通路，告诉ALU执行什么操作以及使用哪些寄存器。</p>
|
||
</li>
|
||
</ul>
|
||
</li>
|
||
<li>
|
||
<p><strong>指令周期</strong>（取指-译码-执行）每秒重复数十亿次：</p>
|
||
<ol>
|
||
<li><strong>取指</strong>：从PC中的地址读取指令。</li>
|
||
<li><strong>译码</strong>：确定指令的功能（加法？从内存加载？分支？）及其使用的操作数。</li>
|
||
<li><strong>执行</strong>：执行操作（ALU计算、内存访问或分支）。</li>
|
||
<li>增加PC（除非指令是分支/跳转）。</li>
|
||
</ol>
|
||
</li>
|
||
<li>
|
||
<p>运行在4 GHz的CPU每秒执行40亿个周期。每个周期耗时0.25纳秒。在这段时间内，光传播约7.5厘米，这就是芯片物理大小重要的原因：信号无法在一个周期内穿过大芯片。</p>
|
||
</li>
|
||
</ul>
|
||
<h2 id="_4">指令集架构<a class="headerlink" href="#_4" title="Permanent link">¶</a></h2>
|
||
<ul>
|
||
<li>
|
||
<p><strong>指令集架构（ISA）</strong>是硬件和软件之间的契约：它定义了CPU能理解的指令、寄存器集、内存模型和编码格式。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>CISC</strong>（复杂指令集计算机）：指令可以复杂、变长，并可以直接访问内存。一条指令可以乘法两个内存值并存储结果。<strong>x86</strong>（Intel/AMD）是占主导地位的CISC ISA，驱动着大多数桌面和服务器。其向后兼容性（现代x86 CPU仍然运行1980年代的代码）既是优势也是负担。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>RISC</strong>（精简指令集计算机）：指令简单、定长，且仅操作寄存器。内存访问需要单独的加载/存储指令。更简单的指令可实现更快的时钟速度和更易实现的流水线。</p>
|
||
<ul>
|
||
<li><strong>ARM</strong>：移动设备的主要RISC ISA，并越来越多地用于服务器和笔记本电脑（Apple M系列芯片就是ARM）。ARM的能效使其非常适合电池供电和热受限设备。</li>
|
||
<li><strong>RISC-V</strong>：一个开源的RISC ISA。任何人都可以设计RISC-V芯片而无需许可费。在嵌入式系统、研究和AI加速器中的采用正在增长。</li>
|
||
</ul>
|
||
</li>
|
||
<li>
|
||
<p>CISC与RISC的区别已经模糊：现代x86 CPU内部将复杂的CISC指令解码为更简单的微操作（本质上是内部RISC），从而获得两方面的优势。</p>
|
||
</li>
|
||
</ul>
|
||
<h2 id="_5">流水线<a class="headerlink" href="#_5" title="Permanent link">¶</a></h2>
|
||
<ul>
|
||
<li>没有流水线时，CPU完全完成一条指令后才开始下一条。这会浪费硬件：当ALU执行时，取指和译码单元处于空闲状态。</li>
|
||
</ul>
|
||
<p><img alt="CPU流水线：指令在取指、译码、执行、访存和写回阶段重叠" src="../../images/cpu_pipeline.svg" /></p>
|
||
<ul>
|
||
<li>
|
||
<p><strong>流水线</strong>使指令执行重叠，如同装配线。当指令1在执行时，指令2在译码，指令3在被取指。一个5级流水线（取指、译码、执行、访存、写回）可以同时有5条指令在执行中。</p>
|
||
</li>
|
||
<li>
|
||
<p>吞吐量接近每周期一条指令（尽管每条指令需要5个周期才能完成）。这与ML中的流水线原理相同：数据并行性使计算和通信重叠（第6章）。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>冒险</strong>是流水线被破坏的情况：</p>
|
||
<ul>
|
||
<li>
|
||
<p><strong>数据冒险</strong>：指令2需要指令1尚未产生的结果。"Add R1, R2, R3"后跟"Sub R4, R1, R5"——第二条指令需要R1，而第一条指令仍在计算。<strong>转发</strong>（旁路）通过将结果直接从一级流水线路由到另一级，无需等待写回阶段来解决这个问题。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>控制冒险</strong>：分支指令（if-else）意味着CPU在分支解析之前不知道应该取指哪条下一条指令。<strong>分支预测</strong>猜测分支将走哪条路径，并推测性地沿预测路径取指。现代预测器准确率超过95%，使用历史表和类似神经网络的模式匹配。一次预测错误代价约~15个周期（流水线必须被清空并重启）。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>结构冒险</strong>：两条指令同时需要相同的硬件资源（例如，都需要内存端口）。通过复制资源或插入停顿来解决。</p>
|
||
</li>
|
||
</ul>
|
||
</li>
|
||
</ul>
|
||
<h2 id="_6">存储器层次结构<a class="headerlink" href="#_6" title="Permanent link">¶</a></h2>
|
||
<ul>
|
||
<li>计算机内存中的根本矛盾：快速内存昂贵且容量小，廉价内存缓慢但容量大。<strong>存储器层次结构</strong>通过利用<strong>局部性</strong>来弥合这一差距：程序倾向于重复访问相同的数据（时间局部性）并访问附近的数据（空间局部性）。</li>
|
||
</ul>
|
||
<p><img alt="存储器层次结构金字塔：寄存器在顶部（快速、小）到HDD在底部（慢、大）" src="../../images/memory_hierarchy.svg" /></p>
|
||
<ul>
|
||
<li>
|
||
<p>层次结构，从最快到最慢：</p>
|
||
<ul>
|
||
<li><strong>寄存器</strong>：~0.3 ns访问，总容量~KB。位于CPU内。</li>
|
||
<li><strong>L1缓存</strong>：~1 ns，每核心32-64 KB。分为指令缓存和数据缓存。</li>
|
||
<li><strong>L2缓存</strong>：~4 ns，每核心256 KB-1 MB。</li>
|
||
<li><strong>L3缓存</strong>：~10 ns，跨核心共享8-64 MB。</li>
|
||
<li><strong>RAM（DRAM）</strong>：~50-100 ns，8-512 GB。主内存。</li>
|
||
<li><strong>SSD</strong>：~10-100 μs，256 GB-8 TB。持久存储。</li>
|
||
<li><strong>HDD</strong>：~5-10 ms，1-20 TB。机械式，随机访问非常慢。</li>
|
||
</ul>
|
||
</li>
|
||
<li>
|
||
<p>寄存器和RAM之间的速度差距约为300倍。寄存器和磁盘之间约为30,000,000倍。缓存层次结构隐藏了这一差距：如果CPU需要的数据在L1缓存中（<strong>缓存命中</strong>），访问很快。如果不在（<strong>缓存未命中</strong>），CPU停顿，同时从更慢的层级获取数据。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>缓存关联度</strong>决定内存地址可以存储在缓存中的位置：</p>
|
||
<ul>
|
||
<li><strong>直接映射</strong>：每个地址映射到恰好一个缓存行。简单但会导致冲突。</li>
|
||
<li><strong>全关联</strong>：任何地址可以放在任何位置。灵活但搜索成本高。</li>
|
||
<li><strong>组关联</strong>（<span class="arithmatex">\(k\)</span>路）：每个地址映射到一组<span class="arithmatex">\(k\)</span>个位置。实际CPU中使用的实用折衷方案（通常为4路或8路）。</li>
|
||
</ul>
|
||
</li>
|
||
<li>
|
||
<p><strong>缓存一致性</strong>确保所有CPU核心看到一致的内存视图。当核心1写入一个核心2已缓存的内存地址时，一致性协议（如MESI）会使核心2的副本失效或更新。这对并发编程（文件4）至关重要，也是共享内存并行性困难的原因之一。</p>
|
||
</li>
|
||
<li>
|
||
<p>对于ML从业者，存储器层次结构解释了为什么：</p>
|
||
<ul>
|
||
<li>矩阵运算应按顺序访问内存（行优先与列优先的布局很重要）。</li>
|
||
<li>批量大小会影响性能：更大的批次分摊内存延迟。</li>
|
||
<li>混合精度（float16/bfloat16）使有效内存带宽翻倍，而内存带宽往往是瓶颈。</li>
|
||
</ul>
|
||
</li>
|
||
</ul>
|
||
<h2 id="_7">虚拟内存<a class="headerlink" href="#_7" title="Permanent link">¶</a></h2>
|
||
<ul>
|
||
<li>
|
||
<p><strong>虚拟内存</strong>使每个进程仿佛拥有自己独立、连续的大内存空间，即使物理RAM是有限的并在进程间共享。</p>
|
||
</li>
|
||
<li>
|
||
<p>地址空间被划分为固定大小的<strong>页</strong>（通常为4 KB）。<strong>页表</strong>将虚拟页号映射到物理帧号。当程序访问虚拟地址0x1234时，CPU通过查找页表将其转换为物理地址。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>转译后备缓冲器（TLB）</strong>是页表项的缓存。由于页表位于RAM中（慢速），TLB在快速硬件中存储最近使用的转译结果。TLB未命中需要遍历内存中的页表，耗费数百个周期。</p>
|
||
</li>
|
||
<li>
|
||
<p>当程序访问一个不在物理RAM中的页时，发生<strong>缺页</strong>。OS从磁盘加载该页（交换），耗费数百万个周期。过多的缺页（<strong>系统颠簸</strong>）会严重损害性能。这就是为什么ML训练需要足够的RAM来容纳模型、优化器状态和合理的数据批次。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>页面置换</strong>算法决定当RAM满时应换出哪个页面：</p>
|
||
<ul>
|
||
<li><strong>LRU</strong>（最近最少使用）：换出最长时间未被访问的页面。在实践中对大多数工作负载最优。在硬件中通过<strong>时钟算法</strong>（带引用位的循环链表）近似实现。</li>
|
||
<li><strong>FIFO</strong>：换出最旧的页面。简单但可能换出频繁使用的页面。</li>
|
||
<li><strong>最优</strong>（Bélády算法）：换出将在最长时间内不被使用的页面。无法实现（需要未来知识）但可作为理论基准。</li>
|
||
</ul>
|
||
</li>
|
||
<li>
|
||
<p>虚拟内存还提供了<strong>隔离</strong>：每个进程都有自己的虚拟地址空间。一个进程中的错误不会破坏另一个进程的内存，因为它们的虚拟地址映射到不同的物理帧。这是OS安全性和稳定性的基础。</p>
|
||
</li>
|
||
</ul>
|
||
<h2 id="iodma">I/O、中断和DMA<a class="headerlink" href="#iodma" title="Permanent link">¶</a></h2>
|
||
<ul>
|
||
<li>
|
||
<p>CPU需要与外部世界通信：磁盘、网卡、键盘、GPU。这就是<strong>I/O子系统</strong>。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>程序控制I/O</strong>（轮询）：CPU在一个循环中反复检查设备的状态寄存器，等待数据就绪。简单但浪费CPU周期做空转而不是有用工作。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>中断驱动I/O</strong>：设备在数据就绪时发送一个硬件<strong>中断</strong>。CPU继续正常执行直到中断到达，然后运行一个<strong>中断处理程序</strong>（内核函数）来处理数据。这比轮询高效得多，因为CPU在等待时不会空闲。</p>
|
||
</li>
|
||
<li>
|
||
<p>中断机制：</p>
|
||
<ol>
|
||
<li>设备通过硬件线路发出中断信号。</li>
|
||
<li>CPU完成当前指令，将当前状态（寄存器、程序计数器）保存到堆栈。</li>
|
||
<li>CPU在<strong>中断向量表</strong>（每个中断类型对应一个函数指针的表）中查找中断处理程序地址。</li>
|
||
<li>处理程序在内核模式下运行，处理I/O，然后返回。</li>
|
||
<li>CPU恢复保存的状态并恢复被中断的程序。</li>
|
||
</ol>
|
||
</li>
|
||
<li>
|
||
<p>这与上下文切换（文件3）的保存/恢复模式相同，但由硬件而非定时器触发。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>DMA</strong>（直接存储器访问）：对于大数据传输（磁盘读取、网络数据包、GPU内存复制），让CPU逐字节复制数据是浪费的。<strong>DMA控制器</strong>直接在设备和RAM之间传输数据，无需CPU参与。CPU设置传输（源地址、目标地址、大小），DMA控制器处理传输，完成后CPU收到一个中断。</p>
|
||
</li>
|
||
<li>
|
||
<p>DMA对ML至关重要：当你调用 <code>model.to('cuda')</code> 时，数据通过PCIe总线上的DMA从系统RAM传输到GPU内存。在训练期间，跨GPU的梯度同步使用基于DMA的RDMA（远程DMA）进行高带宽、低延迟传输（第6章）。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>总线</strong>将CPU连接到内存和I/O设备。现代系统使用<strong>PCIe</strong>（快速外设组件互连）连接高速设备（GPU、NVMe SSD、网卡）。PCIe 4.0在每个x16插槽上提供约~32 GB/s；PCIe 5.0将其翻倍。总线带宽通常是GPU训练的瓶颈：GPU的计算速度可能快于数据送达的速度。</p>
|
||
</li>
|
||
<li>
|
||
<p><strong>MMIO</strong>（内存映射I/O）：设备寄存器被映射到内存地址。CPU使用普通的加载/存储指令对这些地址进行读写，硬件将访问路由到设备而不是RAM。这统一了内存和I/O访问为一个单一机制，简化了硬件和软件。</p>
|
||
</li>
|
||
</ul>
|
||
<h2 id="colab">编程任务（使用CoLab或笔记本）<a class="headerlink" href="#colab" title="Permanent link">¶</a></h2>
|
||
<ol>
|
||
<li>
|
||
<p>探索IEEE 754浮点数表示。将浮点数转换为二进制表示，观察符号、指数和尾数字段。
|
||
<div class="highlight"><pre><span></span><code><a id="__codelineno-0-1" name="__codelineno-0-1" href="#__codelineno-0-1"></a><span class="kn">import</span><span class="w"> </span><span class="nn">struct</span>
|
||
<a id="__codelineno-0-2" name="__codelineno-0-2" href="#__codelineno-0-2"></a>
|
||
<a id="__codelineno-0-3" name="__codelineno-0-3" href="#__codelineno-0-3"></a><span class="k">def</span><span class="w"> </span><span class="nf">float_to_bits</span><span class="p">(</span><span class="n">f</span><span class="p">):</span>
|
||
<a id="__codelineno-0-4" name="__codelineno-0-4" href="#__codelineno-0-4"></a><span class="w"> </span><span class="sd">"""显示float32的IEEE 754二进制表示。"""</span>
|
||
<a id="__codelineno-0-5" name="__codelineno-0-5" href="#__codelineno-0-5"></a> <span class="n">packed</span> <span class="o">=</span> <span class="n">struct</span><span class="o">.</span><span class="n">pack</span><span class="p">(</span><span class="s1">'>f'</span><span class="p">,</span> <span class="n">f</span><span class="p">)</span>
|
||
<a id="__codelineno-0-6" name="__codelineno-0-6" href="#__codelineno-0-6"></a> <span class="n">bits</span> <span class="o">=</span> <span class="s1">''</span><span class="o">.</span><span class="n">join</span><span class="p">(</span><span class="sa">f</span><span class="s1">'</span><span class="si">{</span><span class="n">byte</span><span class="si">:</span><span class="s1">08b</span><span class="si">}</span><span class="s1">'</span> <span class="k">for</span> <span class="n">byte</span> <span class="ow">in</span> <span class="n">packed</span><span class="p">)</span>
|
||
<a id="__codelineno-0-7" name="__codelineno-0-7" href="#__codelineno-0-7"></a> <span class="n">sign</span> <span class="o">=</span> <span class="n">bits</span><span class="p">[</span><span class="mi">0</span><span class="p">]</span>
|
||
<a id="__codelineno-0-8" name="__codelineno-0-8" href="#__codelineno-0-8"></a> <span class="n">exponent</span> <span class="o">=</span> <span class="n">bits</span><span class="p">[</span><span class="mi">1</span><span class="p">:</span><span class="mi">9</span><span class="p">]</span>
|
||
<a id="__codelineno-0-9" name="__codelineno-0-9" href="#__codelineno-0-9"></a> <span class="n">mantissa</span> <span class="o">=</span> <span class="n">bits</span><span class="p">[</span><span class="mi">9</span><span class="p">:]</span>
|
||
<a id="__codelineno-0-10" name="__codelineno-0-10" href="#__codelineno-0-10"></a> <span class="k">return</span> <span class="n">sign</span><span class="p">,</span> <span class="n">exponent</span><span class="p">,</span> <span class="n">mantissa</span>
|
||
<a id="__codelineno-0-11" name="__codelineno-0-11" href="#__codelineno-0-11"></a>
|
||
<a id="__codelineno-0-12" name="__codelineno-0-12" href="#__codelineno-0-12"></a><span class="k">for</span> <span class="n">val</span> <span class="ow">in</span> <span class="p">[</span><span class="mf">1.0</span><span class="p">,</span> <span class="o">-</span><span class="mf">1.0</span><span class="p">,</span> <span class="mf">0.1</span><span class="p">,</span> <span class="mf">0.5</span><span class="p">,</span> <span class="mf">3.14</span><span class="p">,</span> <span class="nb">float</span><span class="p">(</span><span class="s1">'inf'</span><span class="p">),</span> <span class="nb">float</span><span class="p">(</span><span class="s1">'nan'</span><span class="p">)]:</span>
|
||
<a id="__codelineno-0-13" name="__codelineno-0-13" href="#__codelineno-0-13"></a> <span class="n">s</span><span class="p">,</span> <span class="n">e</span><span class="p">,</span> <span class="n">m</span> <span class="o">=</span> <span class="n">float_to_bits</span><span class="p">(</span><span class="n">val</span><span class="p">)</span>
|
||
<a id="__codelineno-0-14" name="__codelineno-0-14" href="#__codelineno-0-14"></a> <span class="nb">print</span><span class="p">(</span><span class="sa">f</span><span class="s2">"</span><span class="si">{</span><span class="n">val</span><span class="si">:</span><span class="s2">>10</span><span class="si">}</span><span class="s2"> sign=</span><span class="si">{</span><span class="n">s</span><span class="si">}</span><span class="s2"> exp=</span><span class="si">{</span><span class="n">e</span><span class="si">}</span><span class="s2"> (</span><span class="si">{</span><span class="nb">int</span><span class="p">(</span><span class="n">e</span><span class="p">,</span><span class="w"> </span><span class="mi">2</span><span class="p">)</span><span class="w"> </span><span class="o">-</span><span class="w"> </span><span class="mi">127</span><span class="si">:</span><span class="s2">>4d</span><span class="si">}</span><span class="s2">) mantissa=</span><span class="si">{</span><span class="n">m</span><span class="p">[:</span><span class="mi">10</span><span class="p">]</span><span class="si">}</span><span class="s2">..."</span><span class="p">)</span>
|
||
</code></pre></div></p>
|
||
</li>
|
||
<li>
|
||
<p>模拟直接映射缓存。跟踪一系列内存访问的命中与未命中。
|
||
<div class="highlight"><pre><span></span><code><a id="__codelineno-1-1" name="__codelineno-1-1" href="#__codelineno-1-1"></a><span class="k">def</span><span class="w"> </span><span class="nf">simulate_cache</span><span class="p">(</span><span class="n">accesses</span><span class="p">,</span> <span class="n">cache_size</span><span class="o">=</span><span class="mi">8</span><span class="p">,</span> <span class="n">block_size</span><span class="o">=</span><span class="mi">1</span><span class="p">):</span>
|
||
<a id="__codelineno-1-2" name="__codelineno-1-2" href="#__codelineno-1-2"></a><span class="w"> </span><span class="sd">"""模拟直接映射缓存。"""</span>
|
||
<a id="__codelineno-1-3" name="__codelineno-1-3" href="#__codelineno-1-3"></a> <span class="n">cache</span> <span class="o">=</span> <span class="p">[</span><span class="kc">None</span><span class="p">]</span> <span class="o">*</span> <span class="n">cache_size</span>
|
||
<a id="__codelineno-1-4" name="__codelineno-1-4" href="#__codelineno-1-4"></a> <span class="n">hits</span><span class="p">,</span> <span class="n">misses</span> <span class="o">=</span> <span class="mi">0</span><span class="p">,</span> <span class="mi">0</span>
|
||
<a id="__codelineno-1-5" name="__codelineno-1-5" href="#__codelineno-1-5"></a>
|
||
<a id="__codelineno-1-6" name="__codelineno-1-6" href="#__codelineno-1-6"></a> <span class="k">for</span> <span class="n">addr</span> <span class="ow">in</span> <span class="n">accesses</span><span class="p">:</span>
|
||
<a id="__codelineno-1-7" name="__codelineno-1-7" href="#__codelineno-1-7"></a> <span class="n">cache_line</span> <span class="o">=</span> <span class="n">addr</span> <span class="o">%</span> <span class="n">cache_size</span>
|
||
<a id="__codelineno-1-8" name="__codelineno-1-8" href="#__codelineno-1-8"></a> <span class="k">if</span> <span class="n">cache</span><span class="p">[</span><span class="n">cache_line</span><span class="p">]</span> <span class="o">==</span> <span class="n">addr</span><span class="p">:</span>
|
||
<a id="__codelineno-1-9" name="__codelineno-1-9" href="#__codelineno-1-9"></a> <span class="n">hits</span> <span class="o">+=</span> <span class="mi">1</span>
|
||
<a id="__codelineno-1-10" name="__codelineno-1-10" href="#__codelineno-1-10"></a> <span class="n">status</span> <span class="o">=</span> <span class="s2">"HIT "</span>
|
||
<a id="__codelineno-1-11" name="__codelineno-1-11" href="#__codelineno-1-11"></a> <span class="k">else</span><span class="p">:</span>
|
||
<a id="__codelineno-1-12" name="__codelineno-1-12" href="#__codelineno-1-12"></a> <span class="n">misses</span> <span class="o">+=</span> <span class="mi">1</span>
|
||
<a id="__codelineno-1-13" name="__codelineno-1-13" href="#__codelineno-1-13"></a> <span class="n">cache</span><span class="p">[</span><span class="n">cache_line</span><span class="p">]</span> <span class="o">=</span> <span class="n">addr</span>
|
||
<a id="__codelineno-1-14" name="__codelineno-1-14" href="#__codelineno-1-14"></a> <span class="n">status</span> <span class="o">=</span> <span class="s2">"MISS"</span>
|
||
<a id="__codelineno-1-15" name="__codelineno-1-15" href="#__codelineno-1-15"></a> <span class="nb">print</span><span class="p">(</span><span class="sa">f</span><span class="s2">" Access </span><span class="si">{</span><span class="n">addr</span><span class="si">:</span><span class="s2">3d</span><span class="si">}</span><span class="s2"> → line </span><span class="si">{</span><span class="n">cache_line</span><span class="si">}</span><span class="s2">: </span><span class="si">{</span><span class="n">status</span><span class="si">}</span><span class="s2">"</span><span class="p">)</span>
|
||
<a id="__codelineno-1-16" name="__codelineno-1-16" href="#__codelineno-1-16"></a>
|
||
<a id="__codelineno-1-17" name="__codelineno-1-17" href="#__codelineno-1-17"></a> <span class="nb">print</span><span class="p">(</span><span class="sa">f</span><span class="s2">"</span><span class="se">\n</span><span class="s2">Hits: </span><span class="si">{</span><span class="n">hits</span><span class="si">}</span><span class="s2">, Misses: </span><span class="si">{</span><span class="n">misses</span><span class="si">}</span><span class="s2">, Hit rate: </span><span class="si">{</span><span class="n">hits</span><span class="o">/</span><span class="p">(</span><span class="n">hits</span><span class="o">+</span><span class="n">misses</span><span class="p">)</span><span class="si">:</span><span class="s2">.1%</span><span class="si">}</span><span class="s2">"</span><span class="p">)</span>
|
||
<a id="__codelineno-1-18" name="__codelineno-1-18" href="#__codelineno-1-18"></a>
|
||
<a id="__codelineno-1-19" name="__codelineno-1-19" href="#__codelineno-1-19"></a><span class="c1"># 顺序访问（良好的局部性）</span>
|
||
<a id="__codelineno-1-20" name="__codelineno-1-20" href="#__codelineno-1-20"></a><span class="nb">print</span><span class="p">(</span><span class="s2">"顺序访问："</span><span class="p">)</span>
|
||
<a id="__codelineno-1-21" name="__codelineno-1-21" href="#__codelineno-1-21"></a><span class="n">simulate_cache</span><span class="p">([</span><span class="mi">0</span><span class="p">,</span> <span class="mi">1</span><span class="p">,</span> <span class="mi">2</span><span class="p">,</span> <span class="mi">3</span><span class="p">,</span> <span class="mi">4</span><span class="p">,</span> <span class="mi">5</span><span class="p">,</span> <span class="mi">6</span><span class="p">,</span> <span class="mi">7</span><span class="p">,</span> <span class="mi">0</span><span class="p">,</span> <span class="mi">1</span><span class="p">,</span> <span class="mi">2</span><span class="p">,</span> <span class="mi">3</span><span class="p">])</span>
|
||
<a id="__codelineno-1-22" name="__codelineno-1-22" href="#__codelineno-1-22"></a>
|
||
<a id="__codelineno-1-23" name="__codelineno-1-23" href="#__codelineno-1-23"></a><span class="c1"># 跨步访问（冲突未命中）</span>
|
||
<a id="__codelineno-1-24" name="__codelineno-1-24" href="#__codelineno-1-24"></a><span class="nb">print</span><span class="p">(</span><span class="s2">"</span><span class="se">\n</span><span class="s2">跨步访问（stride = cache size）："</span><span class="p">)</span>
|
||
<a id="__codelineno-1-25" name="__codelineno-1-25" href="#__codelineno-1-25"></a><span class="n">simulate_cache</span><span class="p">([</span><span class="mi">0</span><span class="p">,</span> <span class="mi">8</span><span class="p">,</span> <span class="mi">0</span><span class="p">,</span> <span class="mi">8</span><span class="p">,</span> <span class="mi">0</span><span class="p">,</span> <span class="mi">8</span><span class="p">])</span>
|
||
</code></pre></div></p>
|
||
</li>
|
||
<li>
|
||
<p>演示为什么浮点算术不满足结合律。展示 <span class="arithmatex">\((a + b) + c \neq a + (b + c)\)</span> 的情况。
|
||
<div class="highlight"><pre><span></span><code><a id="__codelineno-2-1" name="__codelineno-2-1" href="#__codelineno-2-1"></a><span class="kn">import</span><span class="w"> </span><span class="nn">jax.numpy</span><span class="w"> </span><span class="k">as</span><span class="w"> </span><span class="nn">jnp</span>
|
||
<a id="__codelineno-2-2" name="__codelineno-2-2" href="#__codelineno-2-2"></a>
|
||
<a id="__codelineno-2-3" name="__codelineno-2-3" href="#__codelineno-2-3"></a><span class="n">a</span> <span class="o">=</span> <span class="n">jnp</span><span class="o">.</span><span class="n">float32</span><span class="p">(</span><span class="mf">1e8</span><span class="p">)</span>
|
||
<a id="__codelineno-2-4" name="__codelineno-2-4" href="#__codelineno-2-4"></a><span class="n">b</span> <span class="o">=</span> <span class="n">jnp</span><span class="o">.</span><span class="n">float32</span><span class="p">(</span><span class="mf">1.0</span><span class="p">)</span>
|
||
<a id="__codelineno-2-5" name="__codelineno-2-5" href="#__codelineno-2-5"></a><span class="n">c</span> <span class="o">=</span> <span class="n">jnp</span><span class="o">.</span><span class="n">float32</span><span class="p">(</span><span class="o">-</span><span class="mf">1e8</span><span class="p">)</span>
|
||
<a id="__codelineno-2-6" name="__codelineno-2-6" href="#__codelineno-2-6"></a>
|
||
<a id="__codelineno-2-7" name="__codelineno-2-7" href="#__codelineno-2-7"></a><span class="n">left</span> <span class="o">=</span> <span class="p">(</span><span class="n">a</span> <span class="o">+</span> <span class="n">b</span><span class="p">)</span> <span class="o">+</span> <span class="n">c</span> <span class="c1"># (1e8 + 1) + (-1e8)</span>
|
||
<a id="__codelineno-2-8" name="__codelineno-2-8" href="#__codelineno-2-8"></a><span class="n">right</span> <span class="o">=</span> <span class="n">a</span> <span class="o">+</span> <span class="p">(</span><span class="n">b</span> <span class="o">+</span> <span class="n">c</span><span class="p">)</span> <span class="c1"># 1e8 + (1 + (-1e8))</span>
|
||
<a id="__codelineno-2-9" name="__codelineno-2-9" href="#__codelineno-2-9"></a>
|
||
<a id="__codelineno-2-10" name="__codelineno-2-10" href="#__codelineno-2-10"></a><span class="nb">print</span><span class="p">(</span><span class="sa">f</span><span class="s2">"(a + b) + c = </span><span class="si">{</span><span class="n">left</span><span class="si">}</span><span class="s2">"</span><span class="p">)</span> <span class="c1"># 应为 1.0</span>
|
||
<a id="__codelineno-2-11" name="__codelineno-2-11" href="#__codelineno-2-11"></a><span class="nb">print</span><span class="p">(</span><span class="sa">f</span><span class="s2">"a + (b + c) = </span><span class="si">{</span><span class="n">right</span><span class="si">}</span><span class="s2">"</span><span class="p">)</span> <span class="c1"># 可能会丢失 1.0</span>
|
||
<a id="__codelineno-2-12" name="__codelineno-2-12" href="#__codelineno-2-12"></a><span class="nb">print</span><span class="p">(</span><span class="sa">f</span><span class="s2">"Equal: </span><span class="si">{</span><span class="n">left</span><span class="w"> </span><span class="o">==</span><span class="w"> </span><span class="n">right</span><span class="si">}</span><span class="s2">"</span><span class="p">)</span>
|
||
<a id="__codelineno-2-13" name="__codelineno-2-13" href="#__codelineno-2-13"></a><span class="nb">print</span><span class="p">(</span><span class="sa">f</span><span class="s2">"</span><span class="se">\n</span><span class="s2">当 1.0 加到 1e8 上时被丢失，因为 float32 只有约 7 位精度"</span><span class="p">)</span>
|
||
</code></pre></div></p>
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