133 lines
3.2 KiB
ArmAsm
133 lines
3.2 KiB
ArmAsm
#include "cpuconfig.h"
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//#include "iorx62n.h"
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EXTERN _rt_thread_switch_interrupt_flag
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EXTERN _rt_interrupt_from_thread
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EXTERN _rt_interrupt_to_thread
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EXTERN _rt_hw_hard_fault_exception
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EXTERN _rt_hw_cpu_shutdown
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/*PUBLIC _Interrupt_SWINT*/
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PUBLIC ___interrupt_27
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PUBLIC ___interrupt_0
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RSEG CODE:CODE(4)
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;/*
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; * rt_base_t rt_hw_interrupt_disable();
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; */
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PUBLIC _rt_hw_interrupt_disable
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_rt_hw_interrupt_disable:
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MVTIPL #MAX_SYSCALL_INTERRUPT_PRIORITY
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RTS
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;/*
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; * void rt_hw_interrupt_enable(rt_base_t level);
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; */
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PUBLIC _rt_hw_interrupt_enable
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_rt_hw_interrupt_enable:
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MVTIPL #KERNEL_INTERRUPT_PRIORITY
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RTS
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; r0 --> switch from thread stack
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; r1 --> switch to thread stack
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; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
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___interrupt_27:
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/* enable interrupt because enter the interrupt,it will be clear */
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SETPSW I
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MVTIPL #MAX_SYSCALL_INTERRUPT_PRIORITY
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PUSH.L R15
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/* justage if it should switch thread*/
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MOV.L #_rt_thread_switch_interrupt_flag, R15
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MOV.L [ R15 ], R15
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CMP #0, R15
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BEQ notask_exit
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/* clean the flag*/
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MOV.L #_rt_thread_switch_interrupt_flag, R15
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MOV.L #0, [ R15 ]
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/* justage if it should save the register*/
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MOV.L #_rt_interrupt_from_thread, R15
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MOV.L [ R15 ], R15
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CMP #0, R15
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BEQ need_modify_isp
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/*save register*/
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MVFC USP, R15
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SUB #12, R15
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MVTC R15, USP
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MOV.L [ R0 ], [ R15 ] ;PSW
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MOV.L 4[ R0 ], 4[ R15 ];PC
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MOV.L 8[ R0 ], 8[ R15 ] ;R15
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ADD #12, R0
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SETPSW U
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PUSHM R1-R14
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MVFC FPSW, R15
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PUSH.L R15
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MVFACHI R15
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PUSH.L R15
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MVFACMI R15 ; Middle order word.
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SHLL #16, R15 ; Shifted left as it is restored to the low orde r w
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PUSH.L R15
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/*save thread stack pointer and switch to new thread*/
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MOV.L #_rt_interrupt_from_thread, R15
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MOV.L [ R15 ], R15
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MOV.L R0, [ R15 ]
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BRA switch_to_thread
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need_modify_isp:
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MVFC ISP, R15
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ADD #12, R15
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MVTC R15, ISP
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switch_to_thread:
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SETPSW U
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MOV.L #_rt_interrupt_to_thread, R15
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MOV.L [ R15 ], R15
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MOV.L [ R15 ], R0
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POP R15
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MVTACLO R15
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POP R15
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MVTACHI R15
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POP R15
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MVTC R15, FPSW
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POPM R1-R15
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BRA pendsv_exit
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notask_exit:
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POP R15
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pendsv_exit:
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MVTIPL #KERNEL_INTERRUPT_PRIORITY
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RTE
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NOP
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NOP
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/*exception interrupt*/
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___interrupt_0:
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PUSH.L R15
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/*save the register for infomation*/
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MVFC USP, R15
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SUB #12, R15
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MVTC R15, USP
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MOV.L [ R0 ], [ R15 ] ;PSW
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MOV.L 4[ R0 ], 4[ R15 ];PC
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MOV.L 8[ R0 ], 8[ R15 ] ;R15
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ADD #12, R0
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SETPSW U
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PUSHM R1-R14
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MVFC FPSW, R15
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PUSH.L R15
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MVFACHI R15
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PUSH.L R15
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MVFACMI R15 ; Middle order word.
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SHLL #16, R15 ; Shifted left as it is restored to the low orde r w
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PUSH.L R15
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/*save the exception infomation add R1 as a parameter of
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* function rt_hw_hard_fault_exception
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*/
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MOV.L R0, R1
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BRA _rt_hw_hard_fault_exception
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BRA _rt_hw_cpu_shutdown
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RTE
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NOP
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NOP
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END
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