352 lines
7.0 KiB
ArmAsm
352 lines
7.0 KiB
ArmAsm
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/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-10-06 ZhaoXiaowei the first version
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*/
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/*
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*enable gtimer
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*/
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.globl rt_hw_gtimer_enable
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rt_hw_gtimer_enable:
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MOV X0,#1
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MSR CNTP_CTL_EL0,X0
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RET
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/*
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*set gtimer CNTP_TVAL_EL0 value
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*/
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.globl rt_hw_set_gtimer_val
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rt_hw_set_gtimer_val:
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MSR CNTP_TVAL_EL0,X0
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RET
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/*
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*get gtimer CNTP_TVAL_EL0 value
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*/
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.globl rt_hw_get_gtimer_val
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rt_hw_get_gtimer_val:
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MRS X0,CNTP_TVAL_EL0
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RET
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.globl rt_hw_get_cntpct_val
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rt_hw_get_cntpct_val:
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MRS X0, CNTPCT_EL0
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RET
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/*
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*get gtimer frq value
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*/
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.globl rt_hw_get_gtimer_frq
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rt_hw_get_gtimer_frq:
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MRS X0,CNTFRQ_EL0
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RET
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.macro SAVE_CONTEXT
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/* Switch to use the EL0 stack pointer. */
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MSR SPSEL, #0
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/* Save the entire context. */
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STP X0, X1, [SP, #-0x10]!
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STP X2, X3, [SP, #-0x10]!
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STP X4, X5, [SP, #-0x10]!
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STP X6, X7, [SP, #-0x10]!
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STP X8, X9, [SP, #-0x10]!
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STP X10, X11, [SP, #-0x10]!
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STP X12, X13, [SP, #-0x10]!
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STP X14, X15, [SP, #-0x10]!
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STP X16, X17, [SP, #-0x10]!
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STP X18, X19, [SP, #-0x10]!
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STP X20, X21, [SP, #-0x10]!
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STP X22, X23, [SP, #-0x10]!
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STP X24, X25, [SP, #-0x10]!
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STP X26, X27, [SP, #-0x10]!
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STP X28, X29, [SP, #-0x10]!
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STP X30, XZR, [SP, #-0x10]!
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MRS X0, CurrentEL
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CMP X0, 0xc
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B.EQ 3f
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CMP X0, 0x8
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B.EQ 2f
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CMP X0, 0x4
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B.EQ 1f
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B .
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3:
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MRS X3, SPSR_EL3
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/* Save the ELR. */
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MRS X2, ELR_EL3
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B 0f
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2:
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MRS X3, SPSR_EL2
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/* Save the ELR. */
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MRS X2, ELR_EL2
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B 0f
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1:
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MRS X3, SPSR_EL1
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MRS X2, ELR_EL1
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B 0f
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0:
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STP X2, X3, [SP, #-0x10]!
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MOV X0, SP /* Move SP into X0 for saving. */
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/* Switch to use the ELx stack pointer. */
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MSR SPSEL, #1
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.endm
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.macro SAVE_CONTEXT_T
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/* Switch to use the EL0 stack pointer. */
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MSR SPSEL, #0
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/* Save the entire context. */
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STP X0, X1, [SP, #-0x10]!
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STP X2, X3, [SP, #-0x10]!
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STP X4, X5, [SP, #-0x10]!
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STP X6, X7, [SP, #-0x10]!
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STP X8, X9, [SP, #-0x10]!
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STP X10, X11, [SP, #-0x10]!
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STP X12, X13, [SP, #-0x10]!
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STP X14, X15, [SP, #-0x10]!
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STP X16, X17, [SP, #-0x10]!
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STP X18, X19, [SP, #-0x10]!
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STP X20, X21, [SP, #-0x10]!
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STP X22, X23, [SP, #-0x10]!
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STP X24, X25, [SP, #-0x10]!
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STP X26, X27, [SP, #-0x10]!
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STP X28, X29, [SP, #-0x10]!
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STP X30, XZR, [SP, #-0x10]!
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MRS X0, CurrentEL
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CMP X0, 0xc
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B.EQ 3f
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CMP X0, 0x8
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B.EQ 2f
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CMP X0, 0x4
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B.EQ 1f
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B .
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3:
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MRS X3, SPSR_EL3
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MOV X2, X30
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B 0f
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2:
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MRS X3, SPSR_EL2
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MOV X2, X30
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B 0f
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1:
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MRS X3, SPSR_EL1
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MOV X2, X30
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B 0f
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0:
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STP X2, X3, [SP, #-0x10]!
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MOV X0, SP /* Move SP into X0 for saving. */
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/* Switch to use the ELx stack pointer. */
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MSR SPSEL, #1
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.endm
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.macro RESTORE_CONTEXT
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/* Switch to use the EL0 stack pointer. */
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MSR SPSEL, #0
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/* Set the SP to point to the stack of the task being restored. */
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MOV SP, X0
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LDP X2, X3, [SP], #0x10 /* SPSR and ELR. */
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MRS X0, CurrentEL
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CMP X0, 0xc
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B.EQ 3f
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CMP X0, 0x8
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B.EQ 2f
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CMP X0, 0x4
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B.EQ 1f
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B .
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3:
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MSR SPSR_EL3, X3
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MSR ELR_EL3, X2
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B 0f
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2:
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MSR SPSR_EL2, X3
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MSR ELR_EL2, X2
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B 0f
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1:
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MSR SPSR_EL1, X3
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MSR ELR_EL1, X2
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B 0f
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0:
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LDP X30, XZR, [SP], #0x10
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LDP X28, X29, [SP], #0x10
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LDP X26, X27, [SP], #0x10
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LDP X24, X25, [SP], #0x10
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LDP X22, X23, [SP], #0x10
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LDP X20, X21, [SP], #0x10
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LDP X18, X19, [SP], #0x10
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LDP X16, X17, [SP], #0x10
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LDP X14, X15, [SP], #0x10
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LDP X12, X13, [SP], #0x10
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LDP X10, X11, [SP], #0x10
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LDP X8, X9, [SP], #0x10
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LDP X6, X7, [SP], #0x10
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LDP X4, X5, [SP], #0x10
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LDP X2, X3, [SP], #0x10
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LDP X0, X1, [SP], #0x10
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/* Switch to use the ELx stack pointer. _RB_ Might not be required. */
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MSR SPSEL, #1
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ERET
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.endm
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.text
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/*
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* rt_base_t rt_hw_interrupt_disable();
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*/
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.globl rt_hw_interrupt_disable
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rt_hw_interrupt_disable:
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MRS X0, DAIF
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MSR DAIFSet, #3
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DSB SY
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RET
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/*
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* void rt_hw_interrupt_enable(rt_base_t level);
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*/
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.globl rt_hw_interrupt_enable
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rt_hw_interrupt_enable:
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DSB SY
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MOV X1, #0xC0
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ANDS X0, X0, X1
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B.NE rt_hw_interrupt_enable_exit
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MSR DAIFClr, #3
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rt_hw_interrupt_enable_exit:
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RET
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/*
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* void rt_hw_context_switch_to(rt_ubase_t to);
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* r0 --> to
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*/
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.globl rt_hw_context_switch_to
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rt_hw_context_switch_to:
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LDR X0, [X0]
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RESTORE_CONTEXT
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.text
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/*
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* void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
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* r0 --> from
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* r1 --> to
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*/
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.globl rt_hw_context_switch
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rt_hw_context_switch:
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MOV X8,X0
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MOV X9,X1
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SAVE_CONTEXT_T
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STR X0, [X8] // store sp in preempted tasks TCB
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LDR X0, [X9] // get new task stack pointer
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RESTORE_CONTEXT
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/*
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* void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
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*/
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.globl rt_thread_switch_interrupt_flag
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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.globl rt_hw_context_switch_interrupt
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rt_hw_context_switch_interrupt:
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ADR X2, rt_thread_switch_interrupt_flag
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LDR X3, [X2]
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CMP X3, #1
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B.EQ _reswitch
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ADR X4, rt_interrupt_from_thread // set rt_interrupt_from_thread
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MOV X3, #1 // set rt_thread_switch_interrupt_flag to 1
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STR X0, [X4]
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STR X3, [X2]
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_reswitch:
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ADR X2, rt_interrupt_to_thread // set rt_interrupt_to_thread
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STR X1, [X2]
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RET
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.text
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// -- Exception handlers ----------------------------------
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.align 8
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.globl vector_fiq
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vector_fiq:
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SAVE_CONTEXT
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STP X0, X1, [SP, #-0x10]!
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BL rt_hw_trap_fiq
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LDP X0, X1, [SP], #0x10
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RESTORE_CONTEXT
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.globl rt_interrupt_enter
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.globl rt_interrupt_leave
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.globl rt_thread_switch_interrupt_flag
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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// -------------------------------------------------------------------
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.align 8
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.globl vector_irq
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vector_irq:
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SAVE_CONTEXT
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STP X0, X1, [SP, #-0x10]!
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BL rt_interrupt_enter
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BL rt_hw_trap_irq
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BL rt_interrupt_leave
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LDP X0, X1, [SP], #0x10
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// if rt_thread_switch_interrupt_flag set, jump to
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// rt_hw_context_switch_interrupt_do and don't return
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ADR X1, rt_thread_switch_interrupt_flag
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LDR X2, [X1]
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CMP X2, #1
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B.NE vector_irq_exit
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MOV X2, #0 // clear flag
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STR X2, [X1]
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ADR X3, rt_interrupt_from_thread
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LDR X4, [X3]
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STR x0, [X4] // store sp in preempted tasks's TCB
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ADR x3, rt_interrupt_to_thread
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LDR X4, [X3]
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LDR x0, [X4] // get new task's stack pointer
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vector_irq_exit:
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RESTORE_CONTEXT
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// -------------------------------------------------
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.align 8
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.globl vector_error
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vector_error:
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SAVE_CONTEXT
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BL rt_hw_trap_error
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B .
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